Recently, semiconductor devices become more highly integrated. When a plurality of highly integrated semiconductor devices are arranged within a horizontal plane and connected with one another by wiring into a product, the wiring length may increase to lead to an increase in resistance of the wiring and increase in a wiring delay.
Hence, it is proposed to use the three-dimensional integration technology of stacking the semiconductor devices in three dimensions. In this three-dimensional integration technology, for example, a joint apparatus is used to join two semiconductor wafers (hereinafter, referred to as “wafers”). The joint apparatus includes, for example, a beam irradiation means irradiating the front surface of the wafer with inert gas ion beams or inert gas neutral atom beams, and a set of work rollers pressing two wafers in the state that the two wafers are superposed. Then, in the joint apparatus, the beam irradiation means activates the front surfaces (joint surfaces) of the wafers to generate the Van der Waals force between the front surfaces of the two wafers in the state that the two wafers are superposed to thereby temporarily join them. Thereafter, by pressing the two wafers, the wafers are joined together (Patent Document 1).
[Patent Document 1] Japanese Patent Application Laid-open No. 2004-337928